Research

2026

1. SpecFold: Folding Multi-Branch Redundancy for Faster Speculative Decoding in Diffusion Language Models

   Chung-En Ho, Weiyu Sun, Cheng-Jhih Shih, He Li, Yong Liu , and Yingyan Celine Lin

   2026

   arXiv
2. ARK: Avoiding Routing Collisions for KV Cache Transfer in Disaggregated LLM Inference

   Hung-Chun Lin, Ting-Wei Hsu, Chung-En Ho, and Ahmed Saeed

   In Proceedings of the ACM SIGCOMM 2026 Conference, 2026

   Abs DOI

   Disaggregated LLM inference separates the prefill and decode phases across GPU pools, generating massive KV-cache transfers. Because these transfers last hundreds of milliseconds to seconds, they behave as mega elephant flows that dominate link bandwidth utilization. In this regime, stateless ECMP can perform poorly: hash collisions may overload one spine link while leaving others idle, stretching transfer times by seconds. Yet this same persistence makes coordination practical. Since these flows are long-lived, even lightweight one-to-all coordination can be amortized over their lifetime. We present ARK, a distributed elephant-flow path reservation mechanism. ARK coordinates senders to choose source ports whose hashes map concurrent flows onto distinct spines, without requiring switch changes or receiver-side packet reordering. Packet-level RDMA simulations show that ARK reduces mean and P95 FCT by up to 27.3% and 34.0% under moderate load, and further reduces mean TTFT by up to 12.9%.

3. A Quantization Strategy for Communication-Efficient DNN Inference in Vehicular Edge Computing

   Chung-En Ho, Chung-Ting Tsai , and Chung-Wei Lin

   In IEEE Embedded Systems Letters (ESL), 2026

   Abs DOI

   As Deep Neural Network (DNN) applications drive the development of intelligent connected vehicles (ICV), there is a clear need for efficient and reliable DNN processing in ICVs. Vehicular Edge Computing (VEC) is a promising paradigm to meet such demand, where vehicles can cooperate to perform computation tasks. However, there is currently a mismatch between vehicles’ communication capacities and computation capacities, making the communication channel a scarce rsource for DNN inference workloads. This paper proposes a design-time deep reinforcement learning (DRL)-based quantization strategy to alleviate this issue under dynamic communication and computing environments in VEC while complying with a pre-defined accuracy drop constraint. Compared to greedy strategies, our results show significant improvements in communication traffic and inference latency.

2023

1. Design of Analog-AI Hardware Accelerators for Transformer-based Language Models (Invited)

   G. W. Burr , H. Tsai, W. Simon, I. Boybat, S. Ambrogio, C.-E. Ho, and 28 more authors

   In International Electron Devices Meeting (IEDM), 2023

   Abs DOI

   Analog Non-Volatile Memory-based accelerators offer high-throughput and energy-efficient Multiply-Accumulate operations for the large Fully-Connected layers that dominate Transformer-based Large Language Models. We describe architectural, wafer-scale testing, chip-demo, and hardware-aware training efforts towards such accelerators, and quantify the unique raw-throughput and latency benefits of Fully- (rather than Partially-)Weight-Stationary systems.